View LT3685EDDTRPBF_6250875.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

lt3685 1 3685fb typical application applications 36v, 2a, 2.4mhz step-down switching regulator the lt ? 3685 is an adjustable frequency (200khz to 2.4mhz) monolithic step-down switching regulator that accepts input voltages up to 38v operating and 60v maximum. an internal overvoltage protection circuit turns off the power switch when v in is above 38v typical (36v minimum) which then allows the part to safely withstand 60v transients. a high ef? ciency 0.25 switch is included on the die along with a boost schottky diode and the necessary oscillator, control, and logic circuitry. current mode topology is used for fast transient response and good loop stability. the lt3685s high operating frequency allows the use of small, low cost inductors and ceramic capacitors result- ing in low output ripple while keeping total solution size to a minimum. the low current shutdown mode reduces input supply current to less than 1a while a resistor and capacitor on the run/ss pin provide a controlled output voltage ramp (soft-start). a power good ? ag signals when v out reaches 89% of the programmed output voltage. the lt3685 is available in 10-pin msop and 3mm 3mm dfn packages with exposed pads for low thermal resistance. automotive battery regulation set top box distributed supply regulation industrial supplies wall transformer regulation 3.3v step-down converter sw fb v c pg r t v in bd v in 4.5v to 36v transient to 60v v out 3.3v 2a 4.7f 0.47f 470pf 22f 100k 14k 40.2k 4.7h 316k gnd off on lt3685 3685 ta01 run/ss boost sync ef? ciency load current (a) 0 efficiency (%) 50 0.5 1.0 1.5 2 3685 ta01b 60 100 90 80 70 v in = 12v l = 5.6h f = 800 khz v out = 3.3v v out = 5v , lt, ltc and ltm are registered trademarks of linear technology corporation. burst mode is a registered trademark of linear technology corporation. all other trademarks are the property of their respective owners. wide input range: operation from 3.6v to 36v overvoltage lockout protects circuit through 60v transients 2a maximum output current adjustable switching frequency: 200khz to 2.4mhz low shutdown current: i q < 1a integrated boost diode synchronizable between 250khz to 2mhz power good flag saturating switch design: 0.25 on-resistance 0.790v feedback reference voltage output voltage: 0.79v to 20v soft-start capability small 10-pin thermally enhanced msop and (3mm 3mm) dfn packages features description
lt3685 2 3685fb pin configuration absolute maximum ratings v in , run/ss voltage (note 5) ...................................60v boost pin voltage ...................................................56v boost pin above sw pin .........................................30v fb, rt, v c voltage .......................................................5v pg, bd, sync voltage ..............................................30v (note 1) parameter conditions min typ max units minimum input voltage o 3 3.6 v v in overvoltage lockout o 36 38 40 v quiescent current from v in v run/ss = 0.2v v bd = 3v, not switching v bd = 0, not switching o 0.01 450 1.3 0.5 600 1.7 a a ma operating junction temperature range (note 2) lt3685e ............................................. ?40c to 125c lt3685i .............................................. ?40c to 125c storage temperature range ................... ?65c to 150c lead temperature (soldering, 10 sec) (mse only) ....................................................... 300c order information lead free finish tape and reel part marking package description temperature range lt3685edd#pbf lt3685idd#pbf lt3685emse#pbf lt3685imse#pbf lt3685edd#trpbf lt3685idd#trpbf lt3685emse#trpbf lt3685imse#trpbf lcyg lcyg lt c y f lt c y f 10-lead (3mm 3mm) plastic dfn 10-lead (3mm 3mm) plastic dfn 10-lead plastic msop 10-lead plastic msop ?40c to 125c ?40c to 125c ?40c to 125c ?40c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. *for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ top view dd package 10-lead (3mm s 3mm) plastic dfn 10 9 6 7 8 4 5 3 11 2 1 r t v c fb pg sync bd boost sw v in run/ss ja = 45c/w, jc = 10c/w exposed pad (pin 11) is gnd, must be soldered to pcb 1 2 3 4 5 bd boost sw in run/ss 10 9 8 7 6 r t c fb pg snc top iew mse pacage 10-lead plastic msop 11 ja = 45c/w, jc = 10c/w exposed pad (pin 11) is gnd, must be soldered to pcb electrical caracteristics the o denotes the speci cations which apply over the fll operatin temperatre rane, otherwise speci cations are at t a = 25c. in = 10, run/ss = 10, boost = 15, bd = 3.3 nless otherwise noted. (note 2)
lt3685 3 3685fb parameter conditions min typ max units quiescent current from bd v run/ss = 0.2v v bd = 3v, not switching v bd = 0, not switching 0.01 0.9 1 0.5 1.3 5 a ma a minimum bias voltage (bd pin) 2.7 3 v feedback voltage 780 775 790 790 800 805 mv mv fb pin bias current (note 3) v c = 1.2v 730 na fb voltage line regulation 4v < v in < 36v 0.002 0.01 %/v error amp g m 500 mho error amp gain 1000 v c source current 45 a v c sink current 45 a v c pin to switch current gain 3.5 a/v v c clamp voltage 2v switching frequency r t = 8.66k r t = 29.4k r t = 187k 2.1 0.9 160 2.4 1 200 2.7 1.15 240 mhz mhz khz minimum switch off-time 60 150 ns switch current limit duty cycle = 5% 3.2 3.7 4.2 a switch v cesat i sw = 2a 500 mv boost schottky reverse leakage v sw = 10v, v bd = 0v 0.02 2 a minimum boost voltage (note 4) 1.5 2.1 v boost pin current i sw = 1a 22 35 ma run/ss pin current v run/ss = 2.5v 5 10 a run/ss input voltage high 2.5 v run/ss input voltage low 0.2 v pg threshold offset from feedback voltage v fb rising 90 mv pg hysteresis 12 mv pg leakage v pg = 5v 0.1 1 a pg sink current v pg = 0.4v 100 600 a sync low threshold 0.5 v sync high threshold 0.7 v sync pin bias current v sync = 0v 0.1 a note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3685e is guaranteed to meet performance speci? cations from 0c to 125c. speci? cations over the C40c to 125c operating temperature range are assured by design, characterization and correlation with statistical process controls. the lt3685i speci? cations are guaranteed over the C40c to 125c temperature range. note 3: bias current ? ows out of the fb pin. note 4: this is the minimum voltage across the boost capacitor needed to guarantee full saturation of the switch. note 5: absolute maximum voltage at v in and run/ss pins is 60v for nonrepetitive 1 second transients, and 40v for continuous operation. the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 10v, v run/ss = 10v v boost = 15v, v bd = 3.3v unless otherwise noted. (note 2) electrical characteristics
lt3685 4 3685fb switch current (ma) 0 boost pin current (ma) 10 30 40 50 80 3685 g08 20 60 70 0 1500 500 1000 2000 2500 load current (a) 0 50 efficiency (%) 100 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.0 1.0 3685 g01 60 90 80 70 v in = 24v v in = 34v v in = 12v l: nec plc-0745-5r6 f: 800khz v out = 5v 0 0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 2.0 1.0 load current (a) 50 efficiency (%) 90 3685 g02 60 65 55 85 80 70 75 v in = 12v v in = 7v l: nec plc-0745-5r6 f: 800khz v in = 24v v in = 34v v out = 3.3v input voltage (v) 5 load current (a) 15 3685 g03 2.5 10 20 1.5 1.0 4.0 3.5 3.0 2.0 25 30 typical minimum v out = 3.3v l = 4.7h f = 800 khz switch current (ma) 0 400 500 700 1500 3685 g07 300 200 500 1000 2000 2500 100 0 600 voltage drop (mv) ef? ciency ef? ciency boost pin current switch voltage drop maximum load current t a = 25c unless otherwise noted. duty cycle (%) 0 switch current limit(a) 40 3685 g05 2.5 20 60 1.5 1.0 4.0 3.5 3.0 2.0 80 100 input voltage (v) 5 load current (a) 15 3685 g04 2.5 10 20 1.5 1.0 3.5 3.0 2.0 25 30 typical minimum v out = 5v l = 4.7h f = 800khz temperature (c) switch current limit (a) 2.0 2.5 3.5 3.0 3685 g06 1.5 1.0 0 0.5 4.5 4.0 duty cycle = 10 % duty cycle = 90 % C50 25 C25 0 50 75 100 150 125 switch current limit switch current limit maximum load current typical performance characteristics
lt3685 5 3685fb boost diode current (a) 0 boost diode v f (v) 0.8 1.0 1.2 2.0 3685 g15 0.6 0.4 0 0.5 1.0 1.5 0.2 1.4 run/ss pin voltage (v) 0 switch current limit (a) 3.5 1.5 3685 g13 2.0 1.0 0.5 1 2 0.5 0 4.0 3.0 2.5 1.5 2.5 3 3.5 fb pin voltage (mv) 0 switching frequency (khz) 800 1000 1200 600 3685 g11 600 400 200 400 800 500 100 300 700 900 200 0 r t = 29.4k temperature (?c) minimum switch on time (ns) 80 100 120 3685 g 12 60 40 20 0 140 C50 25 C25 0 50 75 100 15 0 125 run/ss pin voltage (v) 0 run/ss pin current (a) 8 10 12 15 25 3685 g14 6 4 510 20 30 35 2 0 temperature (c) feedback voltage (mv) 800 3685 g09 760 840 780 820 C50 25 C25 0 50 75 100 150 125 temperature (c) frequency (mhz) 1.00 1.10 3685 g10 0.90 0.80 1.20 0.95 1.05 0.85 1.15 C50 25 C25 0 50 75 100 150 125 r t = 29.4k feedback voltage switching frequency frequency foldback minimum switch on-time soft-start run/ss pin current boost diode t a = 25c unless otherwise noted. fb pin error voltage (v) C200 C50 v c pin current (a) C20 0 20 020 0 50 3685 g16 C40 C100 100 40 10 C10 30 C30 error amp output current typical performance characteristics
lt3685 6 3685fb temperature (c) v c voltage (v) 1.50 2.00 2.50 3685 g19 1.00 0.50 0 current limit clamp switching threshold C50 25 C25 0 50 75 100 150 125 load current (a) 1 input voltage (v) 3.0 3.5 1000 0 3685 g17 2.5 2.0 10 100 1000 5.0 4.5 4.0 v out = 3.3v l = 4.7h f = 800khz 1 1000 0 10 100 1000 load current (a) input voltage (v) 5.0 5.5 3685 g18 4.5 4.0 6.5 6.0 v out = 5v l = 4.7h f = 800khz temperature (c) threshold voltage (%) 85 90 95 3685 g20 80 75 C50 25 C25 0 50 75 100 150 125 3685 g21 i l 0.5a/div v sw 5v/div v out 10mv/div v in = 12v; front page application i load = 110ma 1s/div 3685 g22 i l 1a/div v sw 5v/div v out 10mv/div v in = 12v; front page application i load = 1a 1s/div minimum input voltage minimum input voltage v c voltages power good threshold switching waveforms; discontinuous operation switching waveforms; continuous operation t a = 25c unless otherwise noted. typical performance characteristics
lt3685 7 3685fb bd (pin 1): this pin connects to the anode of the boost schottky diode. bd also supplies current to the internal regulator. boost (pin 2): this pin is used to provide a drive voltage, higher than the input voltage, to the internal bipolar npn power switch. sw (pin 3): the sw pin is the output of the internal power switch. connect this pin to the inductor, catch diode and boost capacitor. v in (pin 4): the v in pin supplies current to the lt3685s internal regulator and to the internal power switch. this pin must be locally bypassed. run/ss (pin 5): the run/ss pin is used to put the lt3685 in shutdown mode. tie to ground to shut down the lt3685. tie to 2.5v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section. sync (pin 6): this is the external clock synchronization input. ground this pin when sync function is not used. tie to a clock source for synchronization. clock edges should have rise and fall times faster than 1s. see synchronizing section in applications information. pg (pin 7): the pg pin is the open collector output of an internal comparator. pg remains low until the fb pin is within 11% of the ? nal regulation voltage. pg output is valid when v in is above 3.6v and run/ss is high. fb (pin 8): the lt3685 regulates the fb pin to 0.790v. connect the feedback resistor divider tap to this pin. v c (pin 9): the v c pin is the output of the internal error ampli? er. the voltage on this pin controls the peak switch current. tie an rc network from this pin to ground to compensate the control loop. r t (pin 10): oscillator resistor input. connecting a resistor to ground from this pin sets the switching frequency. exposed pad (pin 11): ground. the exposed pad must be soldered to pcb. + C + C + C oscillator 200khzC2.4mhz v c clamp soft-start slope comp r v in v in run/ss boost sw switch latch v c v out c2 c3 c f l1 c c r c bd r t r2 gnd error amp r1 fb r t c1 pg 0.7v s q s 3685 bd 4 5 10 7 1 2 3 9 11 8 6 internal 0.79v ref sync d1 pin functions block diagram
lt3685 8 3685fb the lt3685 is a constant frequency, current mode step- down regulator. an oscillator, with frequency set by rt, enables an rs ? ip-? op, turning on the internal power switch. an ampli? er and comparator monitor the current ? owing between the v in and sw pins, turning the switch off when this current reaches a level determined by the voltage at v c . an error ampli? er measures the output voltage through an external resistor divider tied to the fb pin and servos the v c pin. if the error ampli? ers output increases, more current is delivered to the output; if it decreases, less current is delivered. an active clamp on the v c pin provides current limit. the v c pin is also clamped to the voltage on the run/ss pin; soft-start is implemented by generating a voltage ramp at the run/ss pin using an external resistor and capacitor. an internal regulator provides power to the control circuitry. the bias regulator normally draws power from the v in pin, but if the bd pin is connected to an external voltage higher than 3v bias power will be drawn from the external source (typically the regulated output voltage). this improves ef? ciency. the run/ss pin is used to place the lt3685 in shutdown, disconnecting the output and reducing the input current to less than 1a. the switch driver operates from either the input or from the boost pin. an external capacitor and diode are used to generate a voltage at the boost pin that is higher than the input supply. this allows the driver to fully saturate the internal bipolar npn power switch for ef? cient operation. the oscillator reduces the lt3685s operating frequency when the voltage at the fb pin is low. this frequency foldback helps to control the output current during startup and overload. the lt3685 contains a power good comparator which trips when the fb pin is at 89% of its regulated value. the pg output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pg pin high. power good is valid when the lt3685 is enabled and v in is above 3.6v. the lt3685 has an overvoltage protection feature which disables switching action when the v in goes above 38v typical (36v minimum). when switching is disabled, the lt3685 can safely sustain input voltages up to 60v. operation
lt3685 9 3685fb fb resistor network the output voltage is programmed with a resistor divider between the output and the fb pin. choose the 1% resis- tors according to: rr v v out 12 079 1 = ? ? ? ? ? ? . ? reference designators refer to the block diagram. setting the switching frequency the lt3685 uses a constant frequency pwm architecture that can be programmed to switch from 200khz to 2.4mhz by using a resistor tied from the r t pin to ground. a table showing the necessary r t value for a desired switching frequency is in figure 1. switching frequency (mhz) r t value (k) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 187 121 88.7 68.1 56.2 46.4 40.2 34 29.4 23.7 19.1 16.2 13.3 11.5 9.76 8.66 figure 1. switching frequency vs. r t value operating frequency tradeoffs selection of the operating frequency is a tradeoff between ef? ciency, component size, minimum dropout voltage, and maximum input voltage. the advantage of high frequency operation is that smaller inductor and capacitor values may be used. the disadvantages are lower ef? ciency, lower maximum input voltage, and higher dropout voltage. the highest acceptable switching frequency (f sw(max) ) for a given application can be calculated as follows: f vv tvvv sw max d out on min d in sw () () ? = + + () where v in is the typical input voltage, v out is the output voltage, v d is the catch diode drop (~0.5v) and v sw is the internal switch drop (~0.5v at max load). this equation shows that slower switching frequency is necessary to safely accommodate high v in /v out ratio. also, as shown in the next section, lower frequency allows a lower dropout voltage. the reason input voltage range depends on the switching frequency is because the lt3685 switch has ? nite minimum on and off times. the switch can turn on for a minimum of ~150ns and turn off for a minimum of ~150ns. typical minimum on time at 25c is 80ns. this means that the minimum and maximum duty cycles are: dc f t dc f t min sw on min max sw off min = = () () ? 1 where f sw is the switching frequency, the t on(min) is the minimum switch on time (~150ns), and the t off(min) is the minimum switch off time (~150ns). these equations show that duty cycle range increases when switching frequency is decreased. a good choice of switching frequency should allow ad- equate input voltage range (see next section) and keep the inductor and capacitor values small. input voltage range the maximum input voltage for lt3685 applications depends on switching frequency, the absolute maximum ratings of the v in and boost pins, and the operating mode. the lt3685 can operate from input voltages up to 38v, and safely withstand input voltages up 60v. note that while v in > 38v (typical), the lt3685 will stop switching, allowing the output to fall out of regulation. while the output is in start-up, short-circuit, or other overload conditions, the switching frequency should be chosen according to the following discussion. for safe operation at inputs up to 60v the switching fre- quency must be set low enough to satisfy v in(max) 40v according to the following equation. if lower v in(max) is desired, this equation can be used directly. applications information
lt3685 10 3685fb v vv ft vv in max out d sw on min dsw () () ? = + + where v in(max) is the maximum operating input voltage, v out is the output voltage, v d is the catch diode drop (~0.5v), v sw is the internal switch drop (~0.5v at max load), f sw is the switching frequency (set by r t ), and t on(min) is the minimum switch on time (~150ns). note that a higher switching frequency will depress the maximum operating input voltage. conversely, a lower switching frequency will be necessary to achieve safe operation at high input voltages. if the output is in regulation and no short-circuit, start- up, or overload events are expected, then input voltage transients of up to 60v are acceptable regardless of the switching frequency. in this mode, the lt3685 may enter pulse skipping operation where some switching pulses are skipped to maintain output regulation. in this mode the output voltage ripple and inductor current ripple will be higher than in normal operation. above 38v switching will stop. the minimum input voltage is determined by either the lt3685s minimum operating voltage of ~3.6v or by its maximum duty cycle (see equation in previous section). the minimum input voltage due to duty cycle is: v vv ft vv in min out d sw off min dsw () () ? ? = + + 1 where v in(min) is the minimum input voltage, and t off(min) is the minimum switch off time (150ns). note that higher switching frequency will increase the minimum input voltage. if a lower dropout voltage is desired, a lower switching frequency should be used. inductor selection for a given input and output voltage, the inductor value and switching frequency will determine the ripple current. the ripple current i l increases with higher v in or v out and decreases with higher inductance and faster switching frequency. a reasonable starting point for selecting the ripple current is: i l = 0.4(i out(max) ) where i out(max) is the maximum output load current. to guarantee suf? cient output current, peak inductor current must be lower than the lt3685s switch current limit (i lim ). the peak inductor current is: i l(peak) = i out(max) + i l /2 where i l(peak) is the peak inductor current, i out(max) is the maximum output load current, and i l is the inductor ripple current. the lt3685s switch current limit (i lim ) is at least 3.5a at low duty cycles and decreases linearly to 2.5a at dc = 0.8. the maximum output current is a func- tion of the inductor ripple current: i out(max) = i lim C i l /2 be sure to pick an inductor ripple current that provides suf? cient maximum output current (i out(max) ). the largest inductor ripple current occurs at the highest v in . to guarantee that the ripple current stays below the speci? ed maximum, the inductor value should be chosen according to the following equation: l vv fi vv v out d sw l out d in max = + ? ? ? ? ? ? + ? ? ? ? ? 1? () ? ? where v d is the voltage drop of the catch diode (~0.4v), v in(max) is the maximum input voltage, v out is the output voltage, f sw is the switching frequency (set by rt), and l is in the inductor value. the inductors rms current rating must be greater than the maximum load current and its saturation current should be about 30% higher. for robust operation in fault conditions (start-up or short circuit) and high input voltage (>30v), the saturation current should be above 3.5a. to keep the ef? ciency high, the series resistance (dcr) should be less than 0.1 , and the core material should be intended for high frequency applications. table 1 lists several vendors and suitable types. applications information
lt3685 11 3685fb table 1. inductor vendors vendor url part series type murata www.murata.com lqh55d open tdk www.componenttdk.com slf7045 slf10145 shielded shielded toko www.toko.com d62cb d63cb d75c d75f shielded shielded shielded open sumida www.sumida.com cr54 cdrh74 cdrh6d38 cr75 open shielded shielded open of course, such a simple design guide will not always re- sult in the optimum inductor for your application. a larger value inductor provides a slightly higher maximum load current and will reduce the output voltage ripple. if your load is lower than 2a, then you can decrease the value of the inductor and operate with higher ripple current. this allows you to use a physically smaller inductor, or one with a lower dcr resulting in higher ef? ciency. there are several graphs in the typical performance characteristics section of this data sheet that show the maximum load current as a function of input voltage and inductor value for several popular output voltages. low inductance may result in discontinuous mode operation, which is okay but further reduces maximum load current. for details of maximum output current and discontinuous mode opera- tion, see linear technology application note 44. finally, for duty cycles greater than 50% (v out /v in > 0.5), there is a minimum inductance required to avoid subharmonic oscillations. see an19. input capacitor bypass the input of the lt3685 circuit with a ceramic capaci- tor of x7r or x5r type. y5v types have poor performance over temperature and applied voltage, and should not be used. a 4.7f to 10f ceramic capacitor is adequate to bypass the lt3685 and will easily handle the ripple current. note that larger input capacitance is required when a lower switching frequency is used. if the input power source has high impedance, or there is signi? cant inductance due to long wires or cables, additional bulk capacitance may be necessary. this can be provided with a lower performance electrolytic capacitor. step-down regulators draw current from the input sup- ply in pulses with very fast rise and fall times. the input capacitor is required to reduce the resulting voltage ripple at the lt3685 and to force this very high frequency switching current into a tight local loop, minimizing emi. a 4.7f capacitor is capable of this task, but only if it is placed close to the lt3685 and the catch diode (see the pcb layout section). a second precaution regarding the ceramic input capacitor concerns the maximum input voltage rating of the lt3685. a ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. if the lt3685 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the lt3685s voltage rating. this situation is easily avoided (see the hot plugging safety section). for space sensitive applications, a 2.2f ceramic capaci- tor can be used for local bypassing of the lt3685 input. however, the lower input capacitance will result in in- creased input current ripple and input voltage ripple, and may couple noise into other circuitry. also, the increased voltage ripple will raise the minimum operating voltage of the lt3685 to ~3.7v. output capacitor and output ripple the output capacitor has two essential functions. along with the inductor, it ? lters the square wave generated by the lt3685 to produce the dc output. in this role it determines the output ripple, and low impedance at the switching frequency is important. the second function is to store energy in order to satisfy transient loads and stabilize the lt3685s control loop. ceramic capacitors have very low equivalent series resistance (esr) and provide the best ripple performance. a good starting value is: c vf out out sw = 100 applications information
lt3685 12 3685fb where f sw is in mhz, and c out is the recommended output capacitance in f. use x5r or x7r types. this choice will provide low output ripple and good transient response. transient performance can be improved with a higher value capacitor if the compensation network is also adjusted to maintain the loop bandwidth. a lower value of output capacitor can be used to save space and cost but transient performance will suffer. see the frequency compensation section to choose an appropriate compensation network. when choosing a capacitor, look carefully through the data sheet to ? nd out what the actual capacitance is under operating conditions (applied voltage and temperature). a physically larger capacitor, or one with a higher voltage rating, may be required. high performance tantalum or electrolytic capacitors can be used for the output capacitor. low esr is important, so choose one that is intended for use in switching regulators. the esr should be speci? ed by the supplier, and should be 0.05 or less. such a capacitor will be larger than a ceramic capacitor and will have a larger capacitance, because the capacitor must be large to achieve low esr. table 2 lists several capacitor vendors. catch diode the catch diode conducts current only during switch off time. average forward current in normal operation can be calculated from: i d(avg) = i out (v in C v out )/v in where i out is the output load current. the only reason to consider a diode with a larger current rating than necessary for nominal operation is for the worst-case condition of shorted output. the diode current will then increase to the typical peak switch current. peak reverse voltage is equal to the regulator input voltage. use a schottky diode with a reverse voltage rating greater than the input voltage. the overvoltage protection feature in the lt3685 will keep the switch off when v in > 38v which allows the use of a 40v rated schottky even when v in ranges up to 60v. table 3 lists several schottky diodes and their manufacturers. table 3. diode vendors part number v r (v) i ave (a) v f at 1a (mv) v f at 2a (mv) on semicnductor mbrm120e mbrm140 20 40 1 1 530 550 595 diodes inc. b220 b230 dfls240l 20 30 40 2 2 2 500 500 500 international recti? er 10bq030 20bq030 30 30 1 2 420 470 470 ceramic capacitors a precaution regarding ceramic capacitors concerns the maximum input voltage rating of the lt3685. a ceramic input capacitor combined with trace or cable inductance vendor phone url part series commands panasonic (714) 373-7366 www.panasonic.com ceramic, polymer, tantalum eef series kemet (864) 963-6300 www.kemet.com ceramic, tantalum t494, t495 sanyo (408) 749-9714 www.sanyovideo.com ceramic, polymer, tantalum poscap murata (408) 436-1300 www.murata.com ceramic avx www.avxcorp.com ceramic, tantalum tps series taiyo yuden (864) 963-6300 www.taiyo-yuden.com ceramic table 2. capacitor vendors applications information
lt3685 13 3685fb forms a high quality (under damped) tank circuit. if the lt3685 circuit is plugged into a live supply, the input volt- age can ring to twice its nominal value, possibly exceeding the lt3685s rating. this situation is easily avoided (see the hot plugging safely section). frequency compensation the lt3685 uses current mode control to regulate the output. this simpli? es loop compensation. in particular, the lt3685 does not require the esr of the output capacitor for stability, so you are free to use ceramic capacitors to achieve low output ripple and small circuit size. frequency compensation is provided by the components tied to the v c pin, as shown in figure 2. generally a capacitor (c c ) and a resistor (r c ) in series to ground are used. in addi- tion, there may be lower value capacitor in parallel. this capacitor (c f ) is not part of the loop compensation but is used to ? lter noise at the switching frequency, and is required only if a phase-lead capacitor is used or if the output capacitor has high esr. loop compensation determines the stability and transient performance. designing the compensation network is a bit complicated and the best values depend on the ap- plication and in particular the type of output capacitor. a practical approach is to start with one of the circuits in this data sheet that is similar to your application and tune the compensation network to optimize the performance. stability should then be checked across all operating conditions, including load current, input voltage and temperature. the lt1375 data sheet contains a more thorough discussion of loop compensation and describes how to test the stability using a transient load. figure 2 shows an equivalent circuit for the lt3685 control loop. the error ampli? er is a transconductance ampli? er with ? nite output impedance. the power section, consisting of the modulator, power switch and inductor, is modeled as a transconductance ampli? er generating an output cur- rent proportional to the voltage at the v c pin. note that the output capacitor integrates this current, and that the capacitor on the v c pin (c c ) integrates the error ampli- ? er output current, resulting in two poles in the loop. in most cases a zero is required and comes from either the output capacitor esr or from a resistor r c in series with c c . this simple model works well as long as the value of the inductor is not too high and the loop crossover frequency is much lower than the switching frequency. a phase lead capacitor (c pl ) across the feedback divider may improve the transient response. figure 3 shows the transient response when the load current is stepped from 500ma to 1500ma and back to 500ma. C + 0.8v sw v c g m = 420mho gnd 3m lt3685 3685 f02 r1 output esr c f c c r c error amplifier fb r2 c1 c1 current mode power stage g m = 3.5mho + polymer or tantalum ceramic c pl figure 2. model for loop response applications information figure 3. transient load response of the lt3685 front page application as the load current is stepped from 500ma to 1500ma. v out = 3.3v 3685 f03 i l 0.5a/div v out 100mv/div 10s/div v in = 12v; front page application
lt3685 14 3685fb boost and bias pin considerations capacitor c3 and the internal boost schottky diode (see the block diagram) are used to generate a boost volt- age that is higher than the input voltage. in most cases a 0.22f capacitor will work well. figure 2 shows three ways to arrange the boost circuit. the boost pin must be more than 2.3v above the sw pin for best ef? ciency. for outputs of 3v and above, the standard circuit (figure 4a) is best. for outputs between 2.8v and 3v, use a 1f boost capacitor. a 2.5v output presents a special case because it is marginally adequate to support the boosted drive stage while using the internal boost diode. for reliable boost pin operation with 2.5v outputs use a good external schottky diode (such as the on semi mbr0540), and a 1f boost capacitor (see figure 4b). for lower output voltages the boost diode can be tied to the input (figure 4c), or to another supply greater than 2.8v. tying bd to v in reduces the maximum input voltage to 30v. the circuit in figure 4a is more ef? cient because the boost pin current and bd pin quiescent current comes from a lower voltage source. you must also be sure that the maximum voltage ratings of the boost and bd pins are not exceeded. the minimum operating voltage of an lt3685 application is limited by the minimum input voltage (3.6v) and by the maximum duty cycle as outlined in a previous section. for proper startup, the minimum input voltage is also limited by the boost circuit. if the input voltage is ramped slowly, or the lt3685 is turned on with its run/ss pin when the output is already in regulation, then the boost capacitor may not be fully charged. because the boost capacitor is charged with the energy stored in the inductor, the circuit will rely on some minimum load current to get the boost circuit running properly. this minimum load will depend on input and output voltages, and on the arrangement of the boost circuit. the minimum load generally goes to zero once the circuit has started. figure 5 shows a plot of minimum load to start and to run as a function of input voltage. in many cases the discharged output capacitor will present a load to the switcher, which will allow it to start. the plots show the worst-case situation where v in is ramping very slowly. for lower start-up voltage, the boost diode can be tied to v in ; however, this restricts the input range to one-half of the absolute maximum rating of the boost pin. v in boost sw bd v in v out 4.7f c3 gnd lt3685 v in boost sw bd v in v out 4.7f c3 d2 gnd lt3685 v in boost sw bd v in v out 4.7f c3 gnd lt3685 3685 fo4 (4a) for v out > 2.8v (4b) for 2.5v < v out < 2.8v (4c) for v out < 2.5v; v in(max) = 30v applications information figure 4. three circuits for generating the boost voltage
lt3685 15 3685fb by choosing a large rc time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply 20a when the run/ss pin reaches 2.5v. synchronization synchronizing the lt3685 oscillator to an external fre- quency can be done by connecting a square wave (with 20% to 80% duty cycle) to the sync pin. the square wave amplitude should have valleys that are below 0.3v and peaks that are above 0.8v (up to 6v). the lt3685 may be synchronized over a 250khz to 2mhz range. the r t resistor should be chosen to set the lt3685 switching frequency 20% below the lowest synchronization input. for example, if the synchronization signal will be 250khz and higher, the r t should be chosen for 200khz. to assure reliable and safe operation the lt3685 will only synchronize when the output voltage is near regulation as indicated by the pg ? ag. it is therefore necessary to choose a large enough inductor value to supply the required output current at the frequency set by the r t resistor. see inductor selection sec- tion. it is also important to note that slope compensation is set by the r t value: when the sync frequency is much higher than the one set by r t , the slope compensation will be signi? cantly reduced which may require a larger inductor value to prevent subharmonic oscillation. at light loads, the inductor current becomes discontinu- ous and the effective duty cycle can be very high. this reduces the minimum input voltage to approximately 300mv above v out . at higher load currents, the inductor current is continuous and the duty cycle is limited by the maximum duty cycle of the lt3685, requiring a higher input voltage to maintain regulation. soft-start the run/ss pin can be used to soft-start the lt3685, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc ? lter to create a voltage ramp at this pin. figure 6 shows the start- up and shut-down waveforms with the soft-start circuit. figure 5. the minimum input voltage depends on output voltage, load current and boost circuit 3685 f05 load current (a) 1 input voltage (v) 4.0 4.5 5.0 10000 3.5 3.0 2.0 10 100 1000 1 10000 10 100 1000 2.5 6.0 5.5 to start (worst case) to run load current (a) input voltage (v) 5.0 6.0 7.0 4.0 2.0 3.0 8.0 to run v out = 3.3v t a = 25c l = 8.2h f = 700khz v out = 5v t a = 25c l = 8.2h f = 700khz to start (worst case) applications information figure 6. to soft-start the lt3685, add a resisitor and capacitor to the run/ss pin 3685 f06 i l 1a/div v run/ss 2v/div v out 2v/div run/ss gnd run 15k 0.22f 2ms/div
lt3685 16 3685fb shorted and reversed input protection if the inductor is chosen so that it wont saturate exces- sively, an lt3685 buck regulator will tolerate a shorted output. there is another situation to consider in systems where the output will be held high when the input to the lt3685 is absent. this may occur in battery charging ap- plications or in battery backup systems where a battery or some other supply is diode or-ed with the lt3685s output. if the v in pin is allowed to ? oat and the run/ss pin is held high (either by a logic signal or because it is tied to v in ), then the lt3685s internal circuitry will pull its quiescent current through its sw pin. this is ? ne if your system can tolerate a few ma in this state. if you ground the run/ss pin, the sw pin current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the lt3685 can pull large currents from the output through the sw pin and the v in pin. figure 7 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. figure 7. diode d4 prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the lt3685 runs only when the input is present v in boost gnd fb run/ss v c sw d4 mbrs140 v in lt3685 3685 f07 v out backup vias to local ground plane vias to v out vias to run/ss vias to pg vias to v in outline of loca l ground plane 3685 f08 l1 c2 r rt r pg r c r2 r1 c c v out d1 c1 gnd vias to sync figure 8. a good pcb layout ensures proper, low emi operation applications information by these components should be as small as possible. these components, along with the inductor and output capacitor, should be placed on the same side of the circuit board, and their connections should be made on that layer. place a local, unbroken ground plane below these components. the sw and boost nodes should be as small as possible. finally, keep the fb and v c nodes small so that the ground traces will shield them from the sw and boost nodes. the exposed pad on the bottom of the package must be soldered to ground so that the pad acts as a heat sink. to keep thermal resistance low, extend the ground plane as much as possible, and add thermal vias under and near the lt3685 to additional ground planes within the circuit board and on the bottom side. hot plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of lt3685 circuits. however, these capaci- tors can cause problems if the lt3685 is plugged into a live supply (see linear technology application note 88 for pcb layout for proper operation and minimum emi, care must be taken during printed circuit board layout. figure 8 shows the recommended component placement with trace, ground plane and via locations. note that large, switched currents ? ow in the lt3685s v in and sw pins, the catch diode (d1) and the input capacitor (c1). the loop formed
lt3685 17 3685fb a complete discussion). the low loss ceramic capacitor, combined with stray inductance in series with the power source, forms an under damped tank circuit, and the voltage at the v in pin of the lt3685 can ring to twice the nominal input voltage, possibly exceeding the lt3685s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the lt3685 into an energized supply, the input network should be designed to prevent this overshoot. figure 9 shows the waveforms that result when an lt3685 circuit is connected to a 24v supply through six feet of 24-gauge twisted pair. the ? rst plot is the response with a 4.7f ceramic capacitor at the input. the input voltage rings as high as 50v and the input current peaks at 26a. a good solution is shown in figure 9b. a 0.7 resistor is added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). a 0.1f capacitor improves high frequency ? ltering. for high input voltages its impact on ef? ciency is minor, reducing ef? ciency by 1.5 percent for a 5v output at full load operating from 24v. high temperature considerations the pcb must provide heat sinking to keep the lt3685 cool. the exposed pad on the bottom of the package must be soldered to a ground plane. this ground should be tied to large copper layers below with thermal vias; these lay- ers will spread the heat dissipated by the lt3685. place applications information additional vias can reduce thermal resistance further. with these steps, the thermal resistance from die (or junction) to ambient can be reduced to ja = 35c/w or less. with 100 lfpm air? ow, this resistance can fall by another 25%. further increases in air? ow will lead to lower thermal re- sistance. because of the large output current capability of the lt3685, it is possible to dissipate enough heat to raise the junction temperature beyond the absolute maximum of 125c. when operating at high ambient temperatures, the maximum load current should be derated as the ambient temperature approaches 125c. power dissipation within the lt3685 can be estimated by calculating the total power loss from an ef? ciency measure- ment and subtracting the catch diode loss and inductor loss. the die temperature is calculated by multiplying the lt3685 power dissipation by the thermal resistance from junction to ambient. other linear technology publications application notes 19, 35 and 44 contain more detailed de- scriptions and design information for buck regulators and other switching regulators. the lt1376 data sheet has a more extensive discussion of output ripple, loop compensation and stability testing. design note 100 shows how to generate a bipolar output supply using a buck regulator.
lt3685 18 3685fb applications information figure 9. a well chosen input network prevents input voltage overshoot and ensures reliable operation when the lt3685 is connected to a live supply + lt3685 4.7f v in 20v/div i in 10a/div 20s/div v in closing switch simulates hot plug i in (9a) (9b) low impedance energized 24v supply stray inductance due to 6 feet (2 meters) of twisted pair + lt3685 4.7f 0.1f 0.7 v in 20v/div i in 10a/div 20s/div danger ringing v in may exceed absolute maximum rating (9c) + lt3685 4.7f 22f 35v ai.ei. 3685 f09 v in 20v/div i in 10a/div 20s/div +
lt3685 19 3685fb typical applications 5v step-down converter 3.3v step-down converter sw fb v c pg r t v in bd v in 6.8v to 36v transient to 60v v out 5v 2a 4.7f 0.47f 22f 100k f = 800khz d: diodes inc. dfls240l l: taiyo yuden np06dzb6r8m d 16.2k 40.2k l 6.8h 536k gnd 470pf on off lt3685 3685 ta02 run/ss boost sync sw fb v c pg r t v in bd v in 4.4v to 36v transient to 60v v out 3.3v 2a 4.7f 0.47f 22f 100k f = 800khz d: diodes inc. dfls240l l: taiyo yuden np06dzb4r7m d 14k 40.2k l 4.7h 316k gnd 470pf on off lt3685 3685 ta03 run/ss boost sync
lt3685 20 3685fb typical applications 5v, 2mhz step-down converter sw fb v c pg r t v in bd v in 8.6v to 22v transient to 36v v out 5v 2a 2.2f 0.47f 22f 100k f = 2mhz d: diodes inc. dfls240l l: sumida cdrh4d22/hp-2r2 d 14k 11.5k l 2.2h 536k gnd 470pf on off lt3685 3685 ta05 run/ss boost sync 2.5v step-down converter sw fb v c pg r t v in bd v in 4v to 36v transient to 60v v out 2.5v 2a 4.7f 1f 47f 100k f = 600khz d1: diodes inc. dfls240l d2: mbr0540 l: taiyo yuden np06dzb4r7m d1 20k 56.2k l 4.7h 215k gnd 330pf on off lt3685 d2 3685 ta04 run/ss boost sync
lt3685 21 3685fb typical applications 1.8v step-down converter 12v step-down converter sw fb v c pg r t v in bd v in 15v to 36v transient to 60v* v out 12v 2a 10f 0.47f 22f 50k f = 800khz d: diodes inc. dfls240l l: nec/tokin plc-0755-100 *use schottky diode rated at v r >45v. d 26.1k 40.2k l 10h 715k gnd 330pf on off lt3685 3685 ta06 run/ss boost sync sw fb v c pg r t v in bd v in 3.5v to 27v v out 1.8v 2a 4.7f 0.47f 47f 100k f = 500khz d: diodes inc. dfls240l l: taiyo yuden np06dzb3r3m d 18.2k 68.1k l 3.3h 127k gnd 330pf on off lt3685 3685 ta08 run/ss boost sync
lt3685 22 3685fb dd package 10-lead plastic dfn (3mm 3mm) (eerence ltc d 0-0-1) 3.00 p 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-2). check the ltc website data sheet for current status of variation assignment 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.38 p 0.10 bottom viewexposed pad 1.65 p 0.10 (2 sides) 0.75 p 0.05 r = 0.115 typ 2.38 p 0.10 (2 sides) 1 5 10 6 pin 1 top mark (see note 6) 0.200 ref 0.00 C 0.05 (dd) dfn 1103 0.25 p 0.05 2.38 p 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 p 0.05 (2 sides) 2.15 p 0.05 0.50 bsc 0.675 p 0.05 3.50 p 0.05 package outline 0.25 p 0.05 0.50 bsc package description
lt3685 23 3685fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. msop (mse) 0307 rev b 0.53 p 0.152 (.021 p .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 C?0.27 (.007 C .011) typ 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 p 0.152 (.193 p .006) 0.497 p 0.076 (.0196 p .003) ref 8 9 10 10 1 7 6 3.00 p 0.102 (.118 p .004) (note 3) 3.00 p 0.102 (.118 p .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 o C 6 o typ detail a detail a gauge plane 5.23 (.206) min 3.20 C 3.45 (.126 C .136) 0.889 p 0.127 (.035 p .005) recommended solder pad layout 0.305 p 0.038 (.0120 p .0015) typ 2.083 p 0.102 (.082 p .004) 2.794 p 0.102 (.110 p .004) 0.50 (.0197) bsc bottom view of exposed pad option 1.83 p 0.102 (.072 p .004) 2.06 p 0.102 (.081 p .004) 0.1016 p 0.0508 (.004 p .002) mse package 10-lead plastic msop (eerence ltc d 0-0-13) package description
lt3685 24 3685fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 ? linear technology corporation 2007 lt 1208 rev b ? printed in usa part number description comments lt1933 500ma (i out ), 500khz step-down switching regulator in sot-23 v in : 3.6v to 36v, v out(min) = 1.2v, i q = 1.6ma, i sd <1a, thinsot package lt3437 60v, 400ma (i out ), micropower step-down dc/dc converter with burst mode v in : 3.3v to 80v, v out(min) = 1.25v, i q = 100a, i sd <1a, 10-pin 3mm x 3mm dfn and 16-pin tssop packages lt1936 36v, 1.4a (i out ), 500khz high ef? ciency step-down dc/dc converter v in : 3.6v to 36v, v out(min) = 1.2v, i q = 1.9ma, i sd <1a, ms8e package lt3493 36v, 1.2a (i out ), 750khz high ef? ciency step-down dc/dc converter v in : 3.6v to 40v, v out(min) = 0.8v, i q = 1.9ma, i sd <1a, 6-pin 2mm x 3mm dfn package lt1976/lt1977 60v, 1.2a (i out ), 200khz/500khz, high ef? ciency step- down dc/dc converter with burst mode v in : 3.3v to 60v, v out(min) = 1.2v, i q = 100a, i sd <1a, 16-pin tssop package lt1767 25v, 1.2a (i out ), 1.1mhz, high ef? ciency step-down dc/dc converter v in : 3v to 25v, v out(min) = 1.2v, i q = 1ma, i sd <6a, ms8e package lt1940 dual 25v, 1.4a (i out ), 1.1mhz, high ef? ciency step-down dc/dc converter v in : 3.6v to 25v, v out(min) = 1.2v, i q = 3.8ma, i sd <30a, 16-pin tssop package lt1766 60v, 1.2a (i out ), 200khz, high ef? ciency step-down dc/dc converter v in : 5.5v to 60v, v out(min) = 1.2v, i q = 2.5ma, i sd = 25a, 16-pin tssop package lt3434/lt3435 60v, 2.4a (i out ), 200/500khz, high ef? ciency step-down dc/dc converter with burst mode v in : 3.3v to 60v, v out(min) = 1.2v, i q = 100a, i sd <1a, 16-pin tssop package lt3480 38v, 2a (i out ), 2.4mhz, high ef? ciency step-down dc/dc converter with burst mode v in : 3.6v to 38v, v out(min) = 0.79v, i q = 70a, i sd <1a, 10-pin 3mm x 3mm dfn and 10-pin msop packages lt3481 36v, 2a (i out ), 2.8mhz, high ef? ciency step-down dc/dc converter with burst mode v in : 3.6v to 34v, v out(min) = 1.26v, i q = 50a, i sd <1a, 10-pin 3mm x 3mm dfn and 10-pin msop packages lt3684 36v, 2a (i out ), 2.8mhz, high ef? ciency step-down dc/dc converter v in : 3.6v to 34v, v out(min) = 1.26v, i q = 1.5ma, i sd <1a, 10-pin 3mm x 3mm dfn and 10-pin msop packages sw fb v c pg r t v in bd v in 3.6v to 27v v out 1.2v 2a 4.7f 0.47f 47f f = 500khz d: diodes inc. dfls240l l: taiyo yuden np06dzb3r3m d 16.2k 68.1k l 3.3h gnd 330pf on off lt3685 3685 ta09 run/ss boost sync 100k 52.3k 1.2v step-down converter related parts typical application

▲Up To Search▲

Price & Availability of LT3685EDDTRPBF

	To Download LT3685EDDTRPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .